XiPU - Design of the IO Data BUS
Overview of the input register, output register, and the IO BUS protocol. It contains a description of all available registers serviced by the IO Board.
1. IO
The IO Data BUS is the only way to communicate the XiPU with the world. It is a 16-bit interface, where 8 bits are used for input and the other 8 bits are used for output.
For each 8-bit input or output, the lowest 4 bits are used for data, and the highest 4 bits are used for transmission flags and statuses. Every transmission on that BUS is initiated by the XiPU and must wait until the IO Board sets the execution finish bit before the next transmission begins.
Only the keyboard and the RS232 can trigger the XiPU to start transmission by using special bits reserved as simple interrupt flags, which means that the input buffer of a specific interface has new incoming data to process.
1.1. Input
Pin | Name | Description |
---|---|---|
0 | IN_DATA_0 | Input data bit 0 |
1 | IN_DATA_1 | Input data bit 1 |
2 | IN_DATA_2 | Input data bit 2 |
3 | IN_DATA_3 | Input data bit 3 |
4 | IN_CLOCK_BIT | Input clock control bit |
5 | IN_KEYBOARD_READY_BIT | Input "keyboard has data to read" control bit [0 - empty, 1 - data in buffer] |
6 | IN_RS232_READY_BIT | Input "RS232 has data to read" control bit [0 - empty, 1 - data in buffer] |
7 | IN_OPERATION_COMPLETE_BIT | Input operation completed control bit. Bit toggles after every ended operation. |
1.2. Output
Pin | Name | Description |
---|---|---|
0 | OUT_DATA_0 | Output data bit 0 |
1 | OUT_DATA_1 | Output data bit 1 |
2 | OUT_DATA_2 | Output data bit 2 |
3 | OUT_DATA_3 | Output data bit 3 |
4 | OUT_HALF_BIT | Output "half selector of the byte" control bit [0 - lower part, 1 - higher part] |
5 | OUT_MODE_BIT | Output "register selection or data transmission mode" control bit [0 - register set, 1 - data transmission] |
6 | OUT_RW_BIT | Output read/write control bit [0 - read, 1 - write] |
7 | OUT_DATA_READY_BIT | Output "data is ready to read from output" control bit [0 - wait, 1 - ready] |
2. Registers
The registers are an 8-bit virtual construct serviced by the IO Board for the XiPU. It is the easiest way to offer access to the devices and peripherals from the XiPU perspective.
It uses a 4-bit addressing method. It means it is possible to address up to 16 different registers directly. In some cases, an additional address field is used, like for access to the File System or other big data fields where extended addressing is needed. Extended addressing method always slow down the access time and total bandwidth on the IO BUS and is used only when it is truly needed.
2.1. Read protocol
1. Set register (optional):
- Reset OUT_MODE_BIT and OUT_DATA_READY_BIT
- Write the register ID to OUT_DATA
- Set OUT_RW_BIT and OUT_DATA_READY_BIT
- Wait until IN_OPERATION_COMPLETE_BIT bit changes value
2. Read data:
- Reset OUT_DATA_READY_BIT, OUT_RW_BIT, OUT_HALF_BIT
- Set OUT_MODE_BIT and OUT_DATA_READY_BIT
- Wait until IN_OPERATION_COMPLETE_BIT bit changes value
- Read lower half from IN_DATA
- Reset OUT_DATA_READY_BIT
- Set OUT_HALF_BIT and OUT_DATA_READY_BIT
- Wait until IN_OPERATION_COMPLETE_BIT bit changes value
- Read higher half from IN_DATA
2.2. Write protocol
1. Set register (optional):
- Reset OUT_MODE_BIT and OUT_DATA_READY_BIT
- Write the register ID to OUT_DATA
- Set OUT_RW_BIT and OUT_DATA_READY_BIT
- Wait until IN_OPERATION_COMPLETE_BIT bit changes value
2. Write data:
- Reset OUT_DATA_READY_BIT and OUT_HALF_BIT
- Set lower half of data to OUT_DATA
- Set OUT_MODE_BIT, OUT_RW_BIT, OUT_DATA_READY_BIT
- Wait until IN_OPERATION_COMPLETE_BIT bit changes value
- Reset OUT_DATA_READY_BIT
- Set higher half of data to OUT_DATA
- Set OUT_HALF_BIT and OUT_DATA_READY_BIT
- Wait until IN_OPERATION_COMPLETE_BIT bit changes value
2.3. List of registers
ID | Name | Type | Description |
---|---|---|---|
0 | REG_KEYBOARD | Read | Read a character from the keyboard buffer |
1 | REG_LED_COMMAND | Write | List of possible commands: 0x0 : LED_RUN_OFF - Disable the "run" LED |
2 | REG_ADDRESS_LOW | Write | Low byte of the address |
3 | REG_ADDRESS_HIGH | Write | High byte of the address |
4 | REG_LCD_COLOR | Write | Lower 4 bits for the foreground color. Higher 4 bits for the background color. |
5 | REG_LCD_CHAR | Write | Print a character on the screen. REG_ADDRESS_LOW is used as a column number and REG_ADDRESS_HIGH is used as a row number. |
6 | REG_LCD_COMMAND | Write | List of possible commands: 0x0 : LCD_CLEAR - Clear the screen |
7 | REG_RS232_RX | Read | Read a character from the receive buffer |
8 | REG_RS232_TX | Write | Write a character into the send buffer |
9 | REG_RTC_FIELD | Read and Write | List of possible fields addressed by REG_ADDRESS_LOW: 0x0 : RTC_YEAR - Year |
10 | REG_RTC_COMMAND | Write | List of possible commands: 0x0 : RTC_READ - Read date and time from the RTC to the buffer |
11 | REG_SPEAKER_FIELD | Read and Write | Read returns a free size in the buffer. List of possible writable fields addressed by REG_ADDRESS_LOW: 0x0 : SPEAKER_NOTE - Note |
12 | REG_SPEAKER_COMMAND | Write | List of possible commands: 0x0 : SPEAKER_CLEAR - Stop playing and clear the buffer |
13 | REG_FS_NAME | Write | Set a name of an application or a file, character by character using REG_ADDRESS_LOW as offset in the name |
14 | REG_FS_DATA | Read | Read data from the buffer, byte by byte, using REG_ADDRESS_LOW as the address. After every read, the address is incremented by 1 automatically. |
15 | REG_FS_COMMAND | Read and Write | List of possible commands: 0x0 : FS_OPEN_APP (read) - Open an application |