Instruction set

30.07.2021

List of all assembler instructions supported by the processor. It contains opcode numbers, the number of cycles needed to execute and description what the one does.

1. Types of operands

Name Description
A, B, X, Y 8-bit registers. It is a part of the opcode.
Val256 8-bit unsigned integer used as constant value. It is added to the opcode payload.
Addr 16-bit unsigned integer used as memory address. It is added to the opcode payload.

2. Opcodes construction

Every opcode can use registers, values and addresses. Decoding and using of the data added to the one is determined by steps of execution stored in uROM.

2.1. Registers

Opcode can have maximum 2 registers as operands. First register is selected by two lowest bits of the opcode. It can select: A, B, X or Y register. That register is selected on BUS A and can be read and write.

The second register can be selected by third and fourth bit to select the same registers like first one. The second option of selecting the second register is using only third bit. In that case the choice is limited only to A or B register. That register is selected on BUS B and can be only read.

All four possible constructions of opcode

2.2. Values and addresses

When an opcode needs an additional data to execute, it can use a payload stored in the memory direct after the opcode. The payload size is only limited by maximum execution steps for the opcode. Order of the multiple payload is not defined. For addresses the low byte is first and the high byte is second.

Four default orders of payload for opcode

2.3. Two-step opcode feature

In some cases like the "xchg" instruction used to swap values between two registers is needed to use two opcodes as one instruction. In that case the feature is used because it is not possible to write data to two different general purpose registers using only one opcode.

From the assembler level these opcodes look like one instruction but in reality the one generates two-step opcode. The second opcode can use values from hidden registers leaved by the first one. These pair of opcodes shall not be separated by other one.

3. Instruction list

3.1. Special instructions

Instruction Operands Opcode Bytes Cycles Flags change Description
nop None 0x00 1 2 No No operation. It can be used for make small delays.
halt None 0xFF 1 Infinity No It stops executing the code. It is one instruction infinity loop. Very helpful for debugging.

3.2. Move, exchange and clear instructions

Instruction Operands Opcode Bytes Cycles Flags change Description
clr ABXY 0xC8-0xCB 1 4 Yes Clear register
mov ABXY2, ABXY1 0x80-0x8F 1 3 No Copy value from ABXY2 to ABXY1
mov Val256, ABXY 0x24-0x27 2 4 No Set Val256 to ABXY
swap ABXY 0x6C-0x6F 1 11 Yes Swap ABXY[0:3] with ABXY[4:7]
xchg ABXY2, ABXY1 1st step: 0xD0-0xDF
2nd step: 0xCC-0xCF
2 7 No Exchange values between ABXY1 and ABXY2. This instruction needs two different opcodes executed one by one. It uses two-step opcode feature.
xchg Addr, ABXY 0x48-0x4B 3 9 No Exchange values between *Addr and ABXY

3.3. ROM access instructions

Instruction Operands Opcode Bytes Cycles Flags change Description
ldf ABXY 0x04-0x07 1 3 No Load value from *YX to ABXY
ldf Addr, ABXY 0x58-0x5B 3 7 No Load value from *Addr to ABXY

3.4. RAM access instructions

Instruction Operands Opcode Bytes Cycles Flags change Description
ldr ABXY 0x08-0x0B 1 3 No Load value from *YX to ABXY
ldr Addr, ABXY 0x5C-0x5F 3 7 No Load value from *Addr to ABXY
str ABXY 0x0C-0x0F 1 3 No Store value from ABXY to *YX
str ABXY, Addr 0x60-0x63 3 7 No Store value from ABXY to *Addr
str Val256 0x01 2 5 No Store Val256 to *YX
str Val256, Addr 0x03 4 9 No Store Val256 to *Addr

3.5. IO operations

Instruction Operands Opcode Bytes Cycles Flags change Description
in ABXY 0x10-0x13 1 3 No Read input to ABXY
out ABXY 0x14-0x17 1 3 No Write ABXY to output
out Val256 0x02 2 4 No Write Val256 to output

3.6. Arithmetic operations

Instruction Operands Opcode Bytes Cycles Flags change Description
inc ABXY 0x18-0x1B 1 4 Yes Increment value of ABXY
incc ABXY 0x70-0x73 1 4 Yes Increment value of ABXY if flag C is not set
dec ABXY 0x1C-0x1F 1 4 Yes Decrement value of ABXY
decc ABXY 0x74-0x77 1 4 Yes Decrement value of ABXY if flag C is set
add AB, ABXY 0x90-0x97 1 4 Yes Add AB to ABXY
add Val256, ABXY 0x2C-0x2F 2 6 Yes Add Val256 to ABXY
addc AB, ABXY 0x98-0x9F 1 4 Yes Add AB to ABXY and increment ABXY if flag C is not set
addc Val256, ABXY 0x30-0x33 2 6 Yes Add Val256 to ABXY and increment ABXY if flag C is not set
sub AB, ABXY 0xA0-0xA8 1 4 Yes Subtract AB from ABXY
sub Val256, ABXY 0x34-0x37 2 6 Yes Subtract Val256 from ABXY
subc AB, ABXY 0xA8-0xAF 1 4 Yes Subtract AB from ABXY and decrement ABXY if flag C is set
subc Val256, ABXY 0x38-0x3B 2 6 Yes Subtract Val256 from ABXY and decrement ABXY if flag C is set

3.7. Logic operations

Instruction Operands Opcode Bytes Cycles Flags change Description
not ABXY 0x20-0x23 1 4 Yes Invert bits of ABXY
and AB, ABXY 0xB0-0xB7 1 4 Yes Make logic AND operation between registers and save to ABXY
and Val256, ABXY 0x3C-0x3F 2 6 Yes Make logic AND operation between Val256 and register and save to ABXY
or AB, ABXY 0xB8-0xBF 1 4 Yes Make logic OR operation between registers and save to ABXY
or Val256, ABXY 0x40-0x43 2 6 Yes Make logic OR operation between Val256 and register and save to ABXY
xor AB, ABXY 0xC0-0xC7 1 4 Yes Make logic XOR operation between registers and save to ABXY
xor Val256, ABXY 0x44-0x47 2 6 Yes Make logic XOR operation between Val256 and register and save to ABXY
shl ABXY 0x78-0x7B 1 4 Yes Shift ABXY one bit left and add "0" on right side
shr ABXY 0x7C-0x7F 1 11 Yes Shift ABXY one bit right and add "0" on left side

3.8. Stack usage

Instruction Operands Opcode Bytes Cycles Flags change Description
push ABXY 0x64-0x67 1 4 No Push value of ABXY on stack
pop ABXY 0x68-0x6B 1 4 No Pop value from stack to ABXY

3.9. Calling procedures

Instruction Operands Opcode Bytes Cycles Flags change Description
call Addr 0xF1 3 11 No Push current address on stack and call procedure at Addr
ret None 0xF2 1 6 No Pop address from stack and return

3.10. Jump instructions

Conditional jump statements use values of status flags generated by "cmp" instruction.

Instruction Operands Opcode Bytes Cycles Flags change Description
cmp AB, ABXY 0xE0-0xE7 1 3 Yes Compare AB to ABXY
cmp Val256, ABXY 0x28-0x2B 2 5 Yes Compare Val256 to ABXY
jmp Addr 0xF0 3 7 No Jump immediately to Addr
je Addr 0xF8 3 skip: 4
jump: 7
No Jump to Addr if equal
jne Addr 0xF9 3 skip: 4
jump: 7
No Jump to Addr if not equal
jg Addr 0xFA 3 skip: 4
jump: 7
No Jump to Addr if greater
jge Addr 0xFB 3 skip: 4
jump: 7
No Jump to Addr if greater or equal
jl Addr 0xFC 3 skip: 4
jump: 7
No Jump to Addr if less
jle Addr 0xFD 3 skip: 4
jump: 7
No Jump to Addr if less or equal

3.11. Loop instructions

Instruction Operands Opcode Bytes Cycles Flags change Description
loope AB, ABXY, Addr 0xE8-0xEF 3 end: 5
jump: 10
Yes Jump to Addr if AB is not equal ABXY. Before jump increment ABXY
loope Val256, ABXY, Addr 0x4C-0x4F 4 end: 7
jump: 12
Yes Jump to Addr if Val256 is not equal ABXY. Before jump increment ABXY
loopz ABXY, Addr 0xF4-0xF7 3 end: 7
jump: 12
Yes Jump to Addr if ABXY is not zero. Before jump decrement ABXY

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